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种子名称： [ DevCourseWeb.com ] Udemy - Building Custom AXI Interface Peripherals for ZYNQ Devices
文件类型： 视频
文件数目： 58个文件
文件大小： 2.96 GB
收录时间： 2022-12-7 12:17
已经下载： 3次
资源热度： 194
最近下载： 2024-12-27 14:25

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[ DevCourseWeb.com ] Udemy - Building Custom AXI Interface Peripherals for ZYNQ Devices.torrent

~Get Your Files Here !/1 - Section 0 Course Framework/1 - Interface Type.mp411.34MB

~Get Your Files Here !/1 - Section 0 Course Framework/2 - Course Framework.mp447.72MB

~Get Your Files Here !/10 - AXI Stream Master Interface with Vivado Template/54 - Agenda.mp42.32MB

~Get Your Files Here !/10 - AXI Stream Master Interface with Vivado Template/55 - Creating AXIS Master Interface P1.mp4145.25MB

~Get Your Files Here !/10 - AXI Stream Master Interface with Vivado Template/56 - Creating AXIS Master Interface P2.mp435.32MB

~Get Your Files Here !/11 - AXIS Slave Interface with Verilog/58 - Agenda.mp41.98MB

~Get Your Files Here !/11 - AXIS Slave Interface with Verilog/59 - Building AXIS Slave Interface with Verilog P1.mp437.08MB

~Get Your Files Here !/11 - AXIS Slave Interface with Verilog/60 - Building AXIS Slave Interface with Verilog P2.mp461.62MB

~Get Your Files Here !/11 - AXIS Slave Interface with Verilog/61 - Building AXIS Slave Interface with Verilog P3.mp423.33MB

~Get Your Files Here !/12 - AXIS Master Slave Interface with Verilog/63 - Agenda.mp42.37MB

~Get Your Files Here !/12 - AXIS Master Slave Interface with Verilog/64 - Building AXIS Master Slave Interface with Verilog P1.mp457.49MB

~Get Your Files Here !/12 - AXIS Master Slave Interface with Verilog/65 - Building AXIS Master Slave Interface with Verilog P2.mp445.1MB

~Get Your Files Here !/13 - Understanding Common Errors/68 - Common Error 1.mp419.06MB

~Get Your Files Here !/13 - Understanding Common Errors/69 - Common Error 2.mp424.78MB

~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/3 - Agenda.mp42.26MB

~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/4 - Slave Lite Interface without I O Ports P1 Creating IP.mp455.29MB

~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/5 - Slave Lite Interface without I O Ports P2 Creating IP.mp449.33MB

~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/6 - Slave Lite Interface without I O Ports P3 Creating IP.mp439.17MB

~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/7 - Slave Lite Interface without I O Ports P4 Creating C Application.mp476.31MB

~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/8 - Slave Lite Interface without I O Ports P5 Creating C Application.mp438.35MB

~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/10 - Agenda.mp42.64MB

~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/11 - Adding Output port to Slave Lite Interface P1.mp450.31MB

~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/12 - Adding Output port to Slave Lite Interface P2.mp437.13MB

~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/13 - Adding Output port to Slave Lite Interface P3.mp433.58MB

~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/14 - Adding Input and Output ports to Slave Lite Interface P1.mp444.79MB

~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/15 - Adding Input and Output ports to Slave Lite Interface P2.mp449.34MB

~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/16 - Adding Input and Output ports to Slave Lite Interface P3.mp422.98MB

~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/17 - Agenda.mp42.26MB

~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/18 - Understanding Mandatory Signal Master Write to Slave (Writing Ops) P1.mp424.55MB

~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/19 - Understanding Mandatory Signal Master Write to Slave (Writing Ops) P2.mp423.98MB

~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/20 - Understanding Mandatory Signal Master read from Slave (Reading Ops).mp412MB

~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/21 - Other Signals in Slave Lite Interface.mp489.56MB

~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/22 - Block Design used in Demonstration.mp437.97MB

~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/23 - Analyzing Signals on ILA Probe.mp498.17MB

~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/24 - Agenda.mp44.98MB

~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/25 - Add Existing RTL Delay Generator P1.mp493.72MB

~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/26 - Add Existing RTL Delay Generator P2.mp443.79MB

~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/27 - Adding Existing RTL Multiplier P1.mp483.11MB

~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/28 - Adding Existing RTL Multiplier P2.mp443.26MB

~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/29 - Adding Exisitng RTL COMPLEX FSM P1.mp454.73MB

~Get Your Files Here !/6 - Adding Interrupts to Slave Lite Interfaces/30 - Agenda.mp41.9MB

~Get Your Files Here !/6 - Adding Interrupts to Slave Lite Interfaces/31 - Fundamentals of Interrupt C Application.mp480.58MB

~Get Your Files Here !/6 - Adding Interrupts to Slave Lite Interfaces/32 - Adding Interrupt with RTL P1.mp490.41MB

~Get Your Files Here !/6 - Adding Interrupts to Slave Lite Interfaces/33 - Adding Interrupt with RTL P2.mp4149.24MB

~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/35 - Agenda.mp42.11MB

~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/36 - Using Vivado Interrupt Template Code P1.mp4100.08MB

~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/37 - Using Vivado Interrupt Template Code P2.mp4213.64MB

~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/39 - Modifying Delay of the Vivado Interrupt Template.mp455.32MB

~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/40 - Generating Continuous Interrupt P1.mp441.46MB

~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/41 - Generating Continuous Interrupt P2.mp421.83MB

~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/42 - Blinking Effect with Interrupt.mp4150.74MB

~Get Your Files Here !/8 - Adding Master Interface/44 - Agenda.mp42.09MB

~Get Your Files Here !/8 - Adding Master Interface/45 - Creating Master Interface with Vivado Template P1.mp4162.54MB

~Get Your Files Here !/8 - Adding Master Interface/46 - Creating Master Interface with Vivado Template P2.mp462.7MB

~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/48 - Agenda.mp42.65MB

~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/49 - Building AXIS Slave Interface P1.mp4138.81MB

~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/50 - Building AXIS Slave Interface P2.mp465.48MB

~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/52 - Building Complex FSM with existing FSM for AXIS.mp463.95MB