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[udemy] Xilinx Vivado Beginners Course to FPGA Development in VHDL [MyFOM]

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种子名称: [udemy] Xilinx Vivado Beginners Course to FPGA Development in VHDL [MyFOM]
文件类型: 视频
文件数目: 11个文件
文件大小: 461.2 MB
收录时间: 2017-1-26 22:29
已经下载: 3
资源热度: 298
最近下载: 2024-12-1 01:47

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[udemy] Xilinx Vivado Beginners Course to FPGA Development in VHDL [MyFOM].torrent
  • Section 1 Introduction to Vivado/How to Download and Install Xilinx Vivado Design Suite.mp440.27MB
  • Section 1 Introduction to Vivado/Introduction.mp416.11MB
  • Section 2 Lab 1/Coding and Simulating Simple VHDL in Vivado.mp434.56MB
  • Section 2 Lab 1/Downloading the Bit-stream to the FPGA.mp446.23MB
  • Section 2 Lab 1/Implementation of VHDL Design in Vivado and IO Pin Planning.mp469.15MB
  • Section 2 Lab 1/Introduction to the Vivado Design Suite Interface and Creating a New Project.mp445.59MB
  • Section 3 Lab 2/Design a Block RAM in IP Integrator.mp450.5MB
  • Section 3 Lab 2/Simulating BRAM memory IP in Vivado.mp422.24MB
  • Section 4 Lab 3/Designing a Microblaze Soft Processor in Vivado IP Integrator.mp459.14MB
  • Section 4 Lab 3/Generating a Microblaze using TCL commands in Vivado.mp420.17MB
  • Section 4 Lab 3/Learn VHDL by Example.mp457.22MB